Description
Astera Labs is hiring a Principal Emulation Engineer in San Jose, California, to build and operate emulation environments for complex ASICs and SoCs used in server, storage, and networking applications. The role partners with design, verification, firmware, and systems engineers to integrate RTL, transactors, protocol models, software, and test infrastructure; validate high-speed interfaces such as PCIe, Ethernet, CXL, NVMe, DDR, SPI, and I2C/I3C; develop reusable emulation models and debug methodologies; and lead the resolution of hardware-software co-simulation issues. Candidates need a bachelor’s degree, 8–12 years of SoC or silicon product experience, strong SystemVerilog and hardware verification skills, and programming experience in Python, Perl, or C. The salary range is $207,000 to $230,000, with possible discretionary bonus, incentives, and benefits.
