Description
Microchip Technology Inc. is hiring a Principal Engineer for its Communications Business Unit Product Development team. The role leads digital design, design-for-test (DFT), physical implementation, RTL synthesis, and static timing analysis signoff for integrated circuits at macro, subsystem, and full-chip levels, using Cadence and Synopsys tools. Responsibilities include developing macro constraints and RAM generations, configuring flows, managing multi-mode multi-corner STA, validating netlist quality, coordinating with RTL, DFT, and APR teams, and supporting advanced-node tapeout. The position requires a relevant bachelor's or graduate degree, 10 years of synthesis, STA, and formal verification experience, scripting skills, low-power design knowledge, and tapeout experience at 16nm or smaller.
