Principal Engineer -Design at Microchip - USA

Language

Location: Saskatoon, Saskatchewan
Level: staff+
Posted: Aug 12, 2026

Description

Microchip Technology Inc. is hiring a Principal Engineer for its Communications Business Unit Product Development team to lead digital design, DFT, physical implementation, and static timing analysis of integrated circuits. The role covers RTL-to-pre-layout netlist generation, STA signoff across macros, subsystems, and full-chip designs, macro and flow development, and collaboration with RTL, DFT, and APR teams. Candidates need a relevant bachelor’s or graduate degree, 10 years of synthesis, STA, and formal verification experience, advanced semiconductor design experience, tapeout experience with 16nm or smaller processes, and proficiency with Cadence or Synopsys synthesis tools.

Required Skills

Digital design
DFT
Physical implementation
Static timing analysis
RTL synthesis
Cadence
Synopsys
TCL/Perl/Python
Formal verification
Low-power logic

Additional Information

Minimum Education: Bachelor’s or graduate degree in Computer Science, Electrical/Electronics, or VLSI Engineering
Required Previous Experiences: 10 years of experience in synthesis, static timing analysis, and formal verification with mainstream tools
Hands-on experience in RTL design, synthesis, low-power logic insertion, and STA signoff at macro and SoC levels
Tapeout experience with one or more projects using 16nm or smaller silicon process technologies
Hands-on experience with Cadence Genus or Synopsys DC/FC synthesis tools
Preferred Qualifications: Ability to learn new flows and influence quality of results
Strong analytical and debugging skills
Strong coding and scripting skills
Understanding of timing models, DFT, libraries, and hierarchical budgeting flows
Strong English communication and interpersonal skills