Description
Microchip Technology Inc. is hiring a Principal Engineer for its CAD Physical Design team to work on full-chip APR and physical implementation, including netlist-to-GDSII flows. The role covers hierarchical, low-power, multi-mode, and multi-corner mixed-signal designs and requires extensive physical-design experience, VLSI and timing-closure knowledge, sign-off tool expertise, UPF and low-power design experience, and proficiency with Tcl and Perl. The position may require 0–25% travel and involves a mix of sitting, walking, and standing work.
