Description
Synopsys is hiring a high-speed SerDes R&D Engineer to develop and validate NRZ and PAM4 transceiver models for PCIe and Ethernet standards. The role involves system simulations, calibration algorithms, silicon-measurement correlation, customer troubleshooting, and collaboration with analog, digital, and hardware engineers. Candidates need an M.Sc. or Ph.D. in Electrical or Computer Engineering, MATLAB/Simulink modeling, analog CMOS circuit design, DSP and communications knowledge, link-budget analysis, wireline and optical protocol familiarity, SerDes equalization experience, and C/Verilog-A/systemVerilog proficiency. The position can be based in either the Mississauga or Ottawa office.
