Description
Microsoft is hiring a Static Timing Analysis Engineer for its Data Processing Unit silicon team. The role owns STA execution from early design exploration through signoff and tapeout, develops and improves STA methodology, manages timing budgets, constraints, ECO flows, rollups, reporting, and closure, and resolves full-chip timing issues. Candidates need a bachelor’s degree in computer or electrical engineering or a related field, at least 7 years of physical design or STA experience, and experience with Synopsys design tools; 10+ years of hands-on physical design experience, flow automation, scripting, and tapeout experience are preferred.
