Process Integration/Yield Engineer at Intel

Language

Setup: Hybrid
Location: Kiryat Gat, South District
Type: Full-time
Level: mid
Posted: Sep 23, 2026

Description

Intel is hiring a Metro Engineer to own and optimize high-volume semiconductor manufacturing equipment and processes, conduct dimensional and defectivity testing, troubleshoot and maintain equipment, improve yield and productivity, and support technology transfer and factory ramps. The role requires a relevant bachelor's degree and experience with wet-etch metrology, manufacturing equipment maintenance, and statistical analysis, and is based in Kiryat-Gat, Israel, with a hybrid work model.

Required Skills

Wet etch metrology
Data analysis
Equipment maintenance
Statistical analysis
Process optimization

Additional Information

Minimum Education: Bachelor's degree in Mechanical, Chemical, Materials, Electronics, Optoelectronics Engineering, Chemistry, or Physics, or equivalent experience
Required Previous Experiences: Metro engineering experience with wet-etch process toolsets
Experience conducting tests, measurements, and data analysis to resolve process variability
Experience or understanding of manufacturing equipment maintenance and troubleshooting
Preferred Qualifications: Strong interpersonal and collaborative skills
Model-Based Problem Solving (MBPS) experience
Prior wet-etch systems and process optimization experience
Knowledge of manufacturing safety protocols