Description
Qualcomm is hiring a Hexagon DSP Core Architect to define micro-architecture for Hexagon DSP core and subsystem blocks, develop RTL, and collaborate with architecture, physical design, low-power, and verification teams. The role requires advanced ASIC design knowledge, including RTL, synthesis, static timing analysis, formal verification, PLDRC, clock-domain crossing, and low-power techniques, along with microprocessor design experience. Qualifications include a bachelor’s, master’s, or PhD in a relevant engineering field with the specified years of experience, and the listed pay range is $191,800 to $287,800.
