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Product Application Engineer PCIe/CXL at Astera Labs

Department: Signal Connectivity Group (US_SCG)Education: education_required

Compensation

$185,000 – $240,000/yr

Location
San Jose, California
Type
Full-time
Level
senior
Posted

Description

Astera Labs is hiring a Principal Product Application Engineer serving as the Asia Region Lead for China. The role provides customer technical guidance, supports semiconductor product development, debugging, and design-in for PCIe/CXL products, owns issue resolution, develops product collateral, and coordinates with headquarters and regional customers. It requires strong electrical engineering expertise, at least 3 years designing in complex high-speed SoC/silicon products, PCIe LTSSM and PCIe 5.0 debug knowledge, silicon/system bring-up experience, lab equipment proficiency, C and Python programming, and professional Mandarin communication. The role works approximately 12:00 PM–9:00 PM Pacific time and offers a base salary of $185,000–$240,000 per year.

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