Description
Synopsys is hiring a Remote Eligible No R&D Engineering, Sr Engineer in Noida, India, to design and simulate embedded memory circuits such as SRAM, ROM, and register files using Cadence Virtuoso. The role supports layout, bitcell characterization, reliability analysis, circuit debugging, cross-functional collaboration, documentation, and scripting automation. Candidates need a bachelor's or master's degree in electrical or electronics engineering or a related field, 1–3 years of CMOS circuit design experience with embedded memory, and knowledge of memory architectures and circuit fundamentals.
