Description
Infineon is hiring an RGP Analog Behavioral Modeling Engineer to develop Verilog-AMS and SystemVerilog behavioral models, mixed-signal simulation workbenches, schematics, netlists, regression automation, DFT support, and analog-digital integration verification. The role requires a BSEE, BSME, or equivalent with at least one year of relevant verification experience, proficiency with Cadence tools, and scripting ability in Python or C/C++. The RGP includes rotations across two to four divisions, approximately 20% travel, and concludes with a return to Andover, Massachusetts; Raleigh, North Carolina; or Austin, Texas.
