Research Associate at Nanyang Technological University

Location: Singapore
Type: Full-time
Level: Entry-level

Description

The School of Electrical and Electronic Engineering at Nanyang Technological University is seeking a highly skilled Research Associate specializing in RISC-V architecture. The successful candidate will integrate Hardware AES and ASCON Accelerators into the RISC-V CVA6 core, requiring deep knowledge of hardware design, cryptographic algorithms, and RISC-V ISA. Key responsibilities include designing and implementing accelerators, defining custom RISC-V instructions, modifying the CVA6 decode/execute stages, and conducting extensive verification.

Required Skills

RISC-V Architecture
Hardware Design
Cryptographic Algorithms
RISC-V ISA
HDL Languages
RTL Design
Toolchain Modification
Assembler
Compiler
Simulation

Additional Information

Required Previous Experiences: Proven experience with RISC-V architecture, especially with custom instruction extensions and pipeline modifications.
Proficiency in HDL languages (Verilog, VHDL, or SystemVerilog) and RTL design.
Proficiency in toolchain modification, including the ability to extend assemblers and compilers (GCC, LLVM) for custom hardware instructions.
Proficiency of FPGA development tools such as Vivado, Quartus, or similar for prototyping.
Preferred Qualifications: Strong understanding of ASIC/FPGA design flows, including synthesis, place and route, and timing closure.
Experience in cryptography and implementing cryptographic algorithms in hardware (AES, ASCON, etc.).