Research Engineer in Digital Circuit Design for Quantum Error Decoding (M/F) at ADSN Career

Language

Location: Saint-Étienne-de-Saint-Geoirs, Auvergne-Rhône-Alpes
Type: Contract
Level: entry

Description

CEA is hiring a Research Engineer in Digital Circuit Design for Quantum Error Decoding for a 36-month fixed-term contract in Grenoble, France. The role focuses on designing and verifying hardware blocks for quantum error-correcting-code decoders, including writing specifications, implementing RTL in SystemVerilog or VHDL, simulating with Questa, and developing test environments. The engineer will collaborate with hardware, software, research, industrial, and academic partners, with possible travel for trade shows, conferences, or partner visits. The candidate should have engineering training, hardware description language and verification expertise, digital simulation and scripting knowledge, and English fluency.

Required Skills

SystemVerilog
VHDL
Hardware verification
QuestaSim
FPGA
Unix
Perl
Python
Git
Xilinx Vivado

Additional Information

Minimum Education: Engineering training
Required Previous Experiences: Junior or a few years of experience
Preferred Qualifications: FPGA logic synthesis tools, including Xilinx Vivado
Signal processing and analog electronics
Translation Company Name: CEA