Description
Apple is hiring a Senior RFIC-PLL Design Engineer for its Wireless Radio team to design analog and digital PLL building blocks and top levels, LOGEN circuits, and related radio features for wireless SoCs. The role spans concept, architecture, transistor-level design, verification, layout, floor planning, tape-out, silicon characterization, debugging, and volume-production compliance. Candidates need a bachelor’s degree, extensive PLL and LOGEN design experience, mixed-signal and RF circuit knowledge, and familiarity with verification and RF design tools; a Ph.D. and experience with deep-sub-micron RF CMOS transceiver production are preferred.
