Description
Renesas is hiring a Senior AMS Verification Engineer in Istanbul to lead verification planning and execution at the block and full-chip levels, collaborate with architects and designers, improve verification methodology, mentor team members, and develop event-driven models for analog IC components. The role requires an MSEE with 10+ years of experience or a PhD with 7+ years of verification experience, advanced SystemVerilog and UVM knowledge, and experience with analog power-management and related circuitry verification.
