Description
NVIDIA is hiring a Senior ASIC Design Engineer to design, implement, and verify high-performance, area- and power-efficient RTL for SoC and GPU products. The role covers architecture and microarchitecture design, RTL design and synthesis, logic and timing verification, verification infrastructure, and collaboration with on-site and remote ASIC development teams. Candidates need a bachelor's or master's degree or equivalent experience, at least five years of relevant experience, VLSI and computer architecture expertise, HDL and scripting skills, and experience with synthesis, timing analysis, and verification tools. The position is hybrid and offers a base salary of 136,000–218,500 USD for Level 3 and 168,000–264,500 USD for Level 4, plus equity and benefits.
