Description
NVIDIA is hiring a Senior ASIC Engineer to develop and implement a high-performance MMU for GPUs, including micro-architecture, architecture decisions, verification, and mentoring. The role requires a bachelor’s or master’s degree in a relevant engineering or computer science field, at least five years of relevant work or research experience, memory-subsystem expertise, proficiency in Verilog and simulation or debug tools, and knowledge of C++ or SystemVerilog. The position is hybrid and offers a base salary of 136,000–218,500 USD for Level 3 and 168,000–264,500 USD for Level 4, along with equity and benefits.
