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Senior ASIC Design Verification Engineer, Compute DSP/AI Processors (multiple levels) at Qualcomm International Inc., Mexico Branch Office

Department: ASICS Engineering

Language

Compensation

CA$129,600 – CA$179,600/yr

Setup
On-site
Location
Markham, Ontario
Type
Full-time
Level
not_specified
Posted

Description

Qualcomm Canada ULC is hiring an ASIC Design Verification Engineer to verify complex IP blocks for Snapdragon DSP processors using UVM methodology, SystemVerilog, functional coverage, assertions, regression, integration testing, and performance testing. The role is open to junior, senior, and staff-level applicants, with requirements ranging from a bachelor's degree and 4+ years of related experience to a master's degree and 3+ years, or a PhD and 2+ years. The listed pay range is $129,600 to $179,600.

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