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Senior ASIC Design Verification Engineer - LPU at NVIDIA

Department: Engineer, Verification

Compensation

$168,000 – $310,500/yr

Setup
On-site
Location
California · Austin, Texas · +4
Type
Full-time
Level
senior
Posted

Description

NVIDIA is hiring an ASIC Verification Engineer to verify the design and implementation of an inference accelerator. The role involves defining verification scope, building testbenches, developing automated verification flows, and collaborating with architects, designers, and pre- and post-silicon verification teams. Candidates need a bachelor’s degree in EE, CS, or CE or equivalent experience, at least 8 years of relevant industry experience, and expertise in SystemVerilog, UVM, random stimulus, functional coverage, assertion-based verification, and ASIC design tools. The posting is marked hybrid and offers base salaries of 168,000–264,500 USD for Level 4 and 196,000–310,500 USD for Level 5, with equity and benefits.

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