Description
NVIDIA is hiring an experienced ASIC Verification Engineer to verify and improve system-level IP and RTL designs across unit, subsystem, and SOC environments. The role involves designing and maintaining verification environments, creating UVM components and tests, developing test plans, launching regressions, automating build and triage steps, and collaborating with architects, designers, and software engineers. Candidates need a bachelor’s or master’s degree in Computer or Electrical Engineering or equivalent experience, at least three years of relevant experience, proficiency in System Verilog, UVM, and OOPS-based programming, strong Python or scripting skills, RTL and computer architecture knowledge, and familiarity with VCS or equivalent simulation and Verdi debug tools. The base salary range is 136,000–218,500 USD for Level 3 and 168,000–264,500 USD for Level 4, with equity and benefits; applications were accepted until September 20, 2026.
