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Senior Chip Design Verification Engineer at NVIDIA

Department: Engineer, ASIC

Language
Setup
On-site
Location
Ashkelon, South District · Tel Aviv, Tel-Aviv District
Type
Full-time
Level
senior
Posted

Description

NVIDIA is hiring a Chip Design Engineer for its Networking Silicon engineering team to join the Tel Aviv or Beer-Sheva group and work on RiscV processor platforms. The role focuses on verifying chip blocks against specifications while optimizing power, area, and performance, with possible involvement in chip development, integration, and debugging. The engineer will collaborate with firmware and other global groups. The position requires a B.Sc./M.Sc. or equivalent experience in Electrical, Communication, or Computer Engineering, at least five years of RTL Frontend ASIC Verification experience, and a high level of English.

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