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Senior Design-for-Test Engineer, ATPG at NVIDIA

Department: Engineer, ASIC

Language
Setup
On-site
Location
Tel Aviv, Tel-Aviv District · Yoqneam Illit, North District
Type
Full-time
Level
senior
Posted

Description

NVIDIA is hiring an experienced DFT Engineer to join its ATPG team and develop next-generation design-for-test technologies. The role owns ATPG flows end to end, including architecture and planning, pattern generation, verification, post-silicon bring-up, diagnosis, and automation for production testing. Candidates need at least five years of hands-on DFT/ATPG experience, strong scripting skills, and a bachelor's degree in electrical or computer engineering; knowledge of scan, BIST, fault models, ATPG, ATE, and silicon bring-up is advantageous.

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