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Senior DFT Power Methodology Engineer at NVIDIA

Department: Engineer, ASIC

Compensation

$196,000 – $368,000/yr

Setup
On-site
Location
California
Type
Full-time
Level
senior
Posted

Description

NVIDIA is hiring a senior DFT Power, Thermal & Voltage Noise Engineer to develop low-power, thermal, and voltage-noise methodologies for manufacturing tests on complex datacenter GPUs. The role involves post-silicon power analysis, DFT methodology development using applied machine learning and generative AI, silicon debug and bring-up, and mentoring junior engineers. Candidates need a BSEE or equivalent experience with 12+ years, an MSEE with 10+ years, or a PhD with 6+ years in DFT design and power, along with VLSI, power analysis, thermal analysis, statistical data analysis, and silicon debug experience. The base salary is 196,000 USD to 310,500 USD for Level 5 and 232,000 USD to 368,000 USD for Level 6, with equity and benefits; applications were accepted until August 30, 2026.

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