Description
The Physical Design Engineer will own the end-to-end physical design flow for high-speed mixed-signal and digital communication chips, from RTL through GDSII, including floorplanning, placement, CTS, routing, STA, power and signal integrity, physical verification, and PPA optimization. The role also serves as TI’s technical authority in customer and partner engagements, establishes physical design methodologies and quality standards, collaborates with EDA, library, memory, and IP teams, and mentors engineers. The position requires 12+ years of physical design or digital backend experience, a relevant engineering or VLSI degree, RTL-to-GDSII expertise, and strong knowledge of timing, power, signal integrity, and physical verification.
