Description
Samsung R&D Center is hiring a Senior Digital Verification Engineer for its Memory team. The role owns the full verification lifecycle for complex digital intellectual property, including planning, test execution, coverage closure, environment architecture, and debugging with design and algorithm engineers. The position requires a BSc in Electrical or Computer Engineering, at least five years of VLSI verification experience, and hands-on expertise in SystemVerilog, UVM, and Python, with Linux/Unix and Cadence tool experience preferred.
