Description
Astera Labs is hiring a Senior Emulation Engineer for its new Israel R&D center to build and execute emulation strategies for complex semiconductor chips powering AI infrastructure. The role focuses on end-to-end emulation flows, RTL bring-up, system-level debug and validation, and cross-functional collaboration with firmware, software, validation, design, and verification teams. Candidates should have a bachelor’s degree in a related engineering field, 3+ years of emulation experience at semiconductor companies, strong SystemVerilog skills, and experience with major emulation platforms such as Zebu, Palladium, or Veloce; a master’s degree, scripting automation, EDA tools, Verdi, and knowledge of high-speed protocols are preferred.
