Description
The role supports the definition, design, and verification of semiconductor package designs, including DFM, DFA, signal and power delivery networks, and coordination with external vendors. It requires an electrical engineering degree or equivalent, experience with 2.5D and 3D package systems and their SI/PI requirements, and at least five years of recent experience using Cadence APD and Allegro toolsets. The position also seeks familiarity with EDA vendor collaboration, Python, SKILL, or TCL, and strong communication and presentation skills. The role is hybrid, with team-specific working patterns determined upon application.
