Description
Arm is hiring a Physical IP Modeling Engineer for its Design Enablement team within Solutions Engineering - Implementation. The role develops and deploys models for standard cells, embedded memories, and custom physical IP; validates them in EDA flows; creates robust validation methodologies; and automates development, validation, and release workflows using scripting and AI-assisted tools. The engineer will also investigate modeling and flow issues with internal teams and EDA vendors. The position requires ASIC/SoC build-flow knowledge, Verilog and SystemVerilog modeling, digital circuit fundamentals, automation scripting, and at least five years of relevant experience.
