Senior Hardware Verification Engineer at Google

Seniority in posting: Advanced

Location: Bengaluru, Karnataka
Level: senior
Posted: Jun 9, 2026

Description

The role owns the full verification lifecycle for digital design blocks and AI/ML workloads on TPU hardware, including verification planning, test execution, coverage closure, constrained-random environments, and critical code development. It also leads chip-engineering teams, coordinates with design, software, system, and physical implementation stakeholders, and represents project status. The position requires a bachelor's degree in a relevant engineering or computer science field and 10 years of experience with hardware verification languages, methodologies, and chip design flow.

Required Skills

System Verilog
Specman
Design verification
Chip design flow
Constrained-random
Coverage closure

Additional Information

Minimum Education: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
Required Previous Experiences: 10 years of experience with hardware verification languages, design verification methodologies, and chip design flow.
Experience creating detailed chip or subsystem design verification strategies and plans.
Experience leading design verification teams through the full cycle, from concept to delivery.
Preferred Qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science with an emphasis on computer architecture.
Experience verifying digital systems using standard IP components and interconnects.
Experience with verification techniques and the full verification lifecycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
Experience with multiple SOC projects or cycles across three or more products.