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Senior Hardware Verification Engineer using UVM at RenesasElectronics

Seniority in posting: senior

Language
Setup
Hybrid
Location
Raanana, Center District
Type
Full-time
Level
senior
Posted

Description

Renesas Electronics is hiring a full-time, on-site Senior Hardware Verification Engineer in Raanana, Israel. The role develops and maintains UVM-based verification environments, testbenches, test cases, and coverage models for complex IP and SoC designs; analyzes specifications, creates verification plans and scenarios, debugs RTL issues, runs regressions, monitors coverage, and contributes to verification automation. The position requires strong UVM and constrained-random verification expertise, formal verification experience, computer architecture knowledge, RTL and Verilog/SystemVerilog skills, and a bachelor’s or master’s degree in a relevant engineering discipline.

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