Description
Array Labs is hiring a Senior High-Speed PCB Layout Engineer to own the physical implementation of high-speed digital and mixed-signal electronics in Altium. The role translates schematics and performance requirements into layouts and functional designs, including component placement, constraint-driven routing, stack-up definition, return-path and reference-plane strategy, and partitioning between sensitive mixed-signal and high-speed digital domains. The engineer will collaborate with electrical design, firmware, mechanical, and test engineers to establish layout constraints, conduct reviews, and support manufacturing releases, with board quality directly affecting signal integrity, power integrity, noise performance, and system reliability.
