Description
Quest Global is hiring an experienced DV / DFx Verification Engineer to verify Design-for-Test and Design-for-Debug features for complex AMD SoCs. The role covers DFx test planning, SystemVerilog/UVM testbench development, directed and constrained-random testing, DFT/DFx feature verification, simulation and regression, root-cause analysis, verification infrastructure, coverage closure, emulation and FPGA support, and collaboration with RTL, architecture, firmware, post-silicon, and product engineering teams. The position requires strong ASIC/SoC design verification, SystemVerilog, UVM, debugging, scripting, and coverage experience, along with a bachelor’s or master’s degree in a relevant engineering field.
