Description
NVIDIA is seeking a Senior Mask Design Engineer to collaborate with package technical leads and design teams on silicon interposer layouts for NVIDIA products. The role involves physical layout with Cadence tools, design feasibility studies, floorplan and custom layout work, verification against design rules and netlists, and resolution of manufacturing, electrical, cost, and schedule issues. Candidates need a B.S. in Electrical Engineering or equivalent experience, at least five years of mask and layout design experience, submicron CMOS knowledge, Cadence Virtuoso expertise, and experience with verification and scripting tools.
