Description
NVIDIA is hiring a Senior Verification Engineer for its Tegra SoC Memory Subsystem IP verification team. The role partners with design and architecture teams to develop verification infrastructure, execute functional and performance test plans, achieve RTL coverage, enable FPGA and software testing, and support post-silicon verification and debugging. Candidates need a BS or MS or equivalent experience, at least three years of ASIC verification experience, exposure to VCS or equivalent simulation and debug tools, and background with System Verilog and UVM. Strong C/C++, dynamic memory controller, debugging, scripting, and teamwork experience are advantageous. The posting is marked hybrid and lists base salary ranges of 136,000–218,500 USD for Level 3 and 168,000–264,500 USD for Level 4.
