Description
NVIDIA is hiring a Senior Memory System Engineer for its ASIC Memory Subsystem team to develop and architect high-speed, low-power memory solutions for Tegra SoCs. The role involves analyzing DDR, LPDDR, and HBM technologies; collaborating with ASIC, firmware, system, and supplier teams; defining memory module, package, and PCB layouts; debugging and validating memory systems; and performing failure analysis. Candidates need a bachelor’s or master’s degree in electrical or computer engineering or equivalent experience, 10 years of DRAM, module, or memory subsystem design experience, and expertise in memory design, ECC, SI/PI, cache and controller interactions, and Python or C/C++ workload analysis. The posting is hybrid and accepts applications through September 25, 2026.
