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Senior Package Layout Engineer at NVIDIA

Department: Engineer, Sys Design

Language
Setup
On-site
Location
Yoqneam Illit, North District
Type
Full-time
Level
senior
Posted

Description

NVIDIA is hiring a Senior IC Packaging Design Engineer for its IC Packaging design team to develop high-speed interconnect systems for ASIC packages used in supercomputers and datacenters. The role involves high-speed and PDN design, substrate and package routing, pad-stack development, pin-out optimization, layout productivity improvements, and end-to-end project management in collaboration with SI/PI, hardware, and product teams. Candidates need an electrical engineering or equivalent qualification, at least five years of package or PCB layout experience including high-speed signal integrity, and significant experience with Cadence Virtuoso, APD (Allegro), or SiP tools.

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