Senior Physical Design AI/ML Engineer, Logic Pathfinding Lab at samsungsemiconductor

Samsung Semiconductor is hiring a Senior Physical Design AI/ML Engineer for its Logic Pathfinding Lab in San Jose. The role focuses on applying machine learning and generative models to optimize chip layout, improve design simulation accuracy and throughput, and accelerate floorplanning, placement, routing, verification, and PDK generation. The engineer will also develop benchmarking capabilities, collaborate with research consortia, and support technology transfer to Samsung’s Logic Technology Development team in Korea. The position requires a PhD with industry experience, strong EDA and AI/ML skills, and daily onsite presence under a flexible work policy.