Description
Micron Technology is hiring a Senior / Principal Layout Engineer to lead layout-driven architecture exploration for next-generation memory modules and interconnects, including DDR6, LPDDR6/LPDDR7, MRDIMM Gen3/Gen4, and SOCAMM2. The role focuses on pre-product definition, feasibility studies, form-factor and routing tradeoffs, SI/PI co-design, advanced PCB technologies, design-rule development, risk assessments, and mentoring. Candidates need a bachelor’s degree in electrical engineering or a related field and 8–15+ years of high-speed PCB layout experience, along with expertise in DDR/LPDDR interfaces, signal and power integrity, and high-end layout tools. The US base salary range is $202,000 to $344,000 per year, with additional benefits, bonuses, and equity.
