Description
K2 is hiring a Senior SerDes Characterization & Post-Silicon Validation Engineer to bring up, characterize, and validate high-speed NRZ and PAM4 SerDes interfaces in complex SoCs, including 112G-class interfaces. The role covers electrical characterization, BER and stress testing, equalization and link-training validation, silicon-to-system debugging, automated test environments, and the development of high-speed validation infrastructure. Candidates need a BS/MS in electrical or computer engineering and at least five years of relevant high-speed SerDes, post-silicon validation, or signal-integrity experience. The position offers a base salary of $170,000–$250,000 plus equity and medical, dental, and vision coverage.
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