Description
K2 is hiring a Senior SerDes Characterization & Post-Silicon Validation Engineer to bring up, characterize, and validate high-speed NRZ and PAM4 SerDes interfaces in complex SoCs, including 112G-class interfaces. The role leads post-silicon bring-up, electrical characterization, BER and stress testing, equalization validation, silicon-to-system transition, and the development of automated test and validation environments. It requires an electrical or computer engineering degree, at least five years of relevant high-speed SerDes experience, and strong knowledge of signal integrity, measurement instrumentation, and debugging across silicon, package, PCB, firmware, and system boundaries.
.png&sig=v2nZgYYThDFAC_8jnYeiVwyQg_jPWWPnfKl3Nm6H2y4)
