Description
Microsoft is hiring a Silicon Design for Test (DFT) Engineer for its Cloud Hardware and Infrastructure Engineering organization. The role owns block-level DFT architecture and implementation for logic and memory test solutions, drives DFT timing closure and signoff across multiple test modes, develops DFT STA constraints and automation, supports post-silicon debug, and collaborates with architecture, design, verification, physical design, CAD, manufacturing, and post-silicon teams. Candidates need a BS, MS, or Ph.D. in Electrical or Computer Engineering plus over five years of DFT and STA experience, along with knowledge of ATPG, JTAG, and memory BIST. The position requires Microsoft and customer or government security screening and access to export-controlled information.
