Skip to main content

Senior Silicon Validation Engineer at Google

Seniority in posting: Mid

Compensation

$163,000 – $236,000/yr

Location
Sunnyvale, California
Type
Full-time
Level
senior
Posted

Description

The TPU Silicon Validation Engineer owns the bringup and New Product Introduction phases for custom ASIC products, developing and executing test plans, characterizing and qualifying silicon subsystems, debugging pre- and post-silicon issues, and collaborating with architecture, design, software, manufacturing, diagnostics, and vendor teams. The role requires a bachelor's degree in a relevant engineering or computer science field and 8 years of hardware engineering, ASIC digital design, design validation, test planning, and test design experience.

For job seekers

Ready to find a role that actually fits?

Upload your résumé, start a Job Search Thread, and let Metaintro rank real openings against your experience — then guide you from search to offer.

Match

Compare live roles against your current evidence.

Position

Turn proof projects into role-specific applications.

Improve

Use market feedback to keep the skill plan current.

Return to navigation