Senior SOC Design Verification Engineer at ARM

The Senior SoC Design Verification Engineer will verify Arm-based IP, subsystems, and SoCs, develop scalable verification environments and automation, and own verification execution from planning through closure. The role covers CPU, PCIe, DDR, security, coherency, memory, interconnect, power-aware, functional, code, toggle, assertion, and coverage activities, along with RTL, testbench, integration, and system-level debugging. It requires a relevant engineering degree and 4–9 years of IP, subsystem, or SoC verification experience, with strong Verilog, SystemVerilog, UVM, C/C++, scripting, and RTL/debug skills.