Description
Arm is hiring a Senior Subsystem Design Verification Engineer within its Solutions SoC Engineering organization. The role verifies complex subsystems for next-generation Arm-based platforms, including interconnects, memory interfaces, peripherals, power management, and software-visible features. Responsibilities span verification planning, reusable verification environment and IP development, test and coverage closure, RTL and testbench debugging, automation, and collaboration with architecture, design, firmware, emulation, FPGA, validation, and post-silicon teams. The position requires a relevant bachelor's or master's degree and 4–9 years of IP or subsystem verification experience, with expertise in Verilog, SystemVerilog, UVM, C/C++, scripting, AMBA protocols, and modern verification methodologies.
