Description
NVIDIA is hiring Physical Design Engineers for its Networking Silicon engineering team to design high-speed communication chips. The role covers RTL-to-GDS physical design, including synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, physical verification, and high-cell-count or high-speed block development. Candidates need an electrical or computer engineering degree or equivalent experience, at least five years of relevant experience, RTL2GDS and physical design flow expertise, and familiarity with EDA tools such as Synopsys or Cadence.
