Description
The Analog Mixed-Signal Designer will develop high-performance, high-speed analog mixed-signal circuits for SerDes PHYs, including receiver, clock recovery, transmitter, bias, clock-generation, phase-interpolator, DLL, VCO, and LDO circuits. The role involves creating block-level specifications, mixed-signal implementations, and behavioral models; collaborating with architecture, packaging, board design, DFT, ESD, and SOC teams; and delivering IP that meets quality, performance, power, and area standards. The position requires a bachelor’s degree and at least 10 years of relevant industry experience, with extensive high-speed SerDes, analog circuit, CMOS, modeling, testing, and IP-delivery experience preferred.
