Description
Qualcomm is hiring a Staff CPU Physical Design Integration Engineer for its Nuvia Data Center CPU team in Cambridge, United Kingdom. The role owns the implementation, integration, and verification of high-frequency CPU layouts, including floorplanning, partitioning, IP integration, clock and power distribution, timing and power analysis, physical verification, and final layout database assembly. The engineer will collaborate with architecture, RTL, CAD, circuit, SoC, and verification teams, develop physical design methodologies and automation, and provide technical leadership and mentorship. Candidates need a bachelor’s, master’s, or PhD in a relevant technical field plus 4, 3, or 2 years of ASIC design, verification, validation, integration, or related experience, respectively, along with strong CPU physical design expertise.
