Description
Lenovo is hiring a full-time Signal Integrity Engineer in Taipei, Taiwan, to analyze and resolve high-speed signal integrity issues across PCIe, GPU, and server platforms. The role includes PCB constraint and design optimization, cable and interconnect integrity, SI simulation and debugging, and the use of tools such as Ansys, Cadence, ICAT, ADS, HSpice, Seasim, and Allegro. Candidates should have extensive SI simulation experience, familiarity with Intel and AMD server chip design, experience with PCIe Gen6 and GPU design, and experience designing cables and reliable printed circuit boards.
