Description
The role focuses on memory-interface signal integrity for Apple SoCs, covering package-to-board design, electrical and physical design, extraction, validation, SI/PI modeling and simulation, test planning, and silicon correlation. The position requires prior DDR or LPDDR interface design and modeling experience, with a BS and 10 years of industry experience as the minimum qualification; MSEE, a Ph.D., and additional memory-interface and simulation experience are preferred.
