Description
The role focuses on memory-interface signal integrity for Apple SoCs, covering package-to-board design, electrical and physical design, extraction and validation, SI/PI modeling and simulation, test-plan execution, and silicon-measurement correlation. The position collaborates with silicon, package, system, circuit, controller, product, and system engineering teams to optimize memory-system design, improve yield, and develop next-generation signaling schemes. A bachelor's degree is the minimum qualification; MSEE, five years of industry experience, a Ph.D., and familiarity with memory-interface integrity, product-package/board design, simulation tools, transmission-line theory, and Python are preferred.
